FPGA-Based Signal Acquisition System

This paper presents a high-performance four-channel signal acquisition system composed of frequency channelizers and signal detectors in a single 6U VME slot. The intense computational complexity necessary to implement such an application requires field programmable gate arrays (FPGAs) to achieve a 10x performance density increase over a traditional GPP implementation. The same application performed on a G4 platform utilized 10 processors, thus indicating a significant savings in size, weight, and power by using FPGA technology.The signal acquisition system was implemented using a RACE++-based FPGA board equipped with two Virtex-II Pro 70 devices and an FPGA Development Kit (FDK) to provide infrastructure components that reduce development time, thus facilitating time to market and mitigating possible FPGA integration risks into a heterogeneous multi-computer environment. Specifically this paper will address the I/O concerns associated with integrating an FPGA solution into a deployable system through the use of VITA 49 over optical fiber and a buffer queue methodology to efficiently coordinate DMA transfers over the RACE++ fabric to downstream processors to take full advantage of the throughput capabilities of the FPGA platform. Additionally, we will examine the design techniques employed to implement a real-time embedded application on commercial off-the-shelf (COTS) hardware.